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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Filters: Author is Francesco Regazzoni  [Clear All Filters]
Conference Paper
Masin, M., F. Palumbo, H. Myrhaug, J. A. de Oliv Filho, M. Pastena, M. Pelcat, L. Raffo, F. Regazzoni, A. A. Sanchez, A. Toffetti, et al., "Cross-layer Design of Reconfigurable Cyber-Physical Systems", Proceedings of Design, Automation and Test in Europe (DATE) 2017, 2017.
Faruque, M. Abdullah A., F. Regazzoni, and M. Pajic, "Design methodologies for securing cyber-physical systems", 2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS, Amsterdam, Netherlands, IEEE, pp. 30-36, 10/2015.
Valencia, F., A. Khalid, E. O'Sullivan, and F. Regazzoni, "The design space of the number theoretic transform: A survey", 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July 17-20, 2017 (Invited), 2017.
Bayrak, A. Galip, N. Velickovic, F. Regazzoni, D. Novo Bruna, P. Brisk, and P. Ienne, "An eda-friendly protection scheme against side-channel attacks", Design, Automation and Test in Europe (DATE), Grenoble, France, March, 2013.
Banik, S., A. Bogdanov, and F. Regazzoni, "Efficient Configurations for Block Ciphers with Unified ENC/DEC Paths", Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2017, 2018.
Sami, M., M. Malek, U. Bondi, and F. Regazzoni, "Embedded Systems Education: Job Market Expectations", Workshop on Embedded and Cyber-Physical Systems Education (WESE) , New Delhi, India, ACM, 10/2014.
Bellon, S., C. Favi, M. Malek, M. Macchetti, and F. Regazzoni, "Evaluating the Impact of Environmental Factors on Physically Unclonable Functions", International Symposium on Field-Programmable Gate Arrays FPGA 2016, Monterey, CA, USA, ACM New York, NY, USA, pp. 279, 02/2016.
Banik, S., A. Bogdanov, and F. Regazzoni, "Exploring Energy Efficiency of Lightweight Block Ciphers", Selected Areas in Cryptography: 22nd International Conference (SAC)2015, vol. 9566, Sackville, NB, Canada, Springer, pp. 178-194, 08/2015.
Banik, S., A. Bogdanov, and F. Regazzoni, "Exploring the energy consumption of lightweight blockciphers in FPGA", International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, 2015, Rivera Maya, Mexico City, IEEE, pp. 1-6, 02/2016, 2015.
Barenghi, A., C. Hocquet, D. Bol, F-X. Standaert, F. Regazzoni, and I. Koren, "Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation", 7th Workshop on RFID Security and Privacy (RFIDSec), Amherst, Massachussets, USA, June, 2011.
Valencia, F., T. Oder, T. Güneysu, and F. Regazzoni, "Exploring the Vulnerability of R-LWE Encryption to Fault Attacks", Workshop on Cryptography and Security in Computing Systems of the HiPEAC2018 Conference, CS2 '18, New York, NY, USA, ACM, 2018.
Piscitelli, R., S. Bhasin, and F. Regazzoni, "Fault attacks, injection techniques and tools for simulation", 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015, Naples, Italy, IEEE, pp. 1-6, 04/2015.
Bayrak, A. Galip, F. Regazzoni, P. Brisk, F-X. Standaert, and P. Ienne, "A First Step Towards Automatic Application of Power Analysis Countermeasures", 48th Design Automation Conference (DAC), San Diego, Califorina, June, 2011.
Regazzoni, F., W. Yi, and F-X. Standaert, "FPGA Implementations of the AES Masked Against Power Analysis Attacks", 2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), Darmstadt, Germany, February, 2011.
Medwed, M., C. Petit, F. Regazzoni, M. Renauld, and F-X. Standaert, "Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks", 10th Smart Card Research and Advanced Application Conference (CARDIS), Leuven, Belgium, September, 2011.
Medwed, M., F-X. Standaert, J. Großschädl, and F. Regazzoni, "Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices", Proceedings of Progress in Cryptology - Africacrypt, Stellenbosch, South Africa, May, 2010.
Gallais, J-F., J. Großschädl, N. Hanley, M. Kasper, M. Medwed, F. Regazzoni, J-M. Schmidt, S. Tillich, and M. Wojcik, "Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software", 2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
Nacul, A C., F. Regazzoni, and M. Lajolo, "HardwareScheduling Support in SMP Architecture", Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
Regazzoni, F., and M. Lajolo, "Hardware/Software Partitioning and Interface Synthesis in Networks On Chip", IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.
Chandra, S., F. Regazzoni, and M. Lajolo, "Hardware/software partitioning of operating systems: a behavioral synthesis approach", GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.

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