Export 8 results:
Author Title Type [ Year] Filters: First Letter Of Title is H and Author is Francesco Regazzoni [Clear All Filters]
"High-Level Synthesis of Benevolent Trojans",
Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), 2019.
Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment,
, First edition; 2016: Springer, 2017.
"Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags",
Springer Journal of Cryptographic Engineering, vol. 1, issue 1, 2011.
"Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software",
2nd International Conference on Trusted Systems (INTRUST), Beijing, China, December, 2010.
Hardware scheduled SMP architectures,
, no. US 11/947,278, 06/2008.
"HardwareScheduling Support in SMP Architecture",
Design, Automation and Test in Europe(DATE), Nice, France, April 16-20, 2007.
"Hardware/software partitioning of operating systems: a behavioral synthesis approach",
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI, Philadelphia, PA, USA, ACM Press, New York, USA, pp. 324–329, 2006.
"Hardware/Software Partitioning and Interface Synthesis in Networks On Chip",
IP Based SoC Design 2005, Grenoble, France, December 7-8, 2005.