Export 10 results:
Author [ Title] Type Year Filters: Keyword is design space exploration [Clear All Filters]
"Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach",
RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
"Bridging the Gap between SysML and Design Space Exploration",
FDL'06 Proceedings, Darmstadt, Germany, pp. 389-394, September 19-22, 2006.
"A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip",
Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
"A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip",
Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
"Design Space Exploration of PISA Architecture For ONU Auto-discovery Process",
proceedings of 6th International Conference of Electrical Engineering (ICEENG), Cairo, Egypt, May 27-29, 2009.
"An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks",
Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
"A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems",
SAC 2003, Melbourne, pp. 672-678, March, 2003.
"Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques",
Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
"OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space",
IEEE Transactions on Computer-Aided Design, vol. 21, issue 5, no. -: IEEE, pp. 740-753, 05/2012.
"A Security-enhanced Design Methodology For Embedded Systems",
ICETE SECRYPT 2013, Reykjavik, Iceland, ICETE, 07/2013.