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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Filters: Keyword is design space exploration  [Clear All Filters]
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F
Ferrante, A., J. Milosevic, and M. Janjusevic, "A Security-enhanced Design Methodology For Embedded Systems", ICETE SECRYPT 2013, Reykjavik, Iceland, ICETE, 07/2013.
Ferrante, A., G. Piscopo, and S. Scaldaferri, "Application-Driven Optimization of VLIW Architectures: A Hardware-Software Approach", RTAS '05: Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, Washington, DC, USA, IEEE Computer Society, pp. 128–137, 03/2005.
M
Mady, A E-D., A. Tonini, and D. Finardi, "Design Space Exploration of PISA Architecture For ONU Auto-discovery Process", proceedings of 6th International Conference of Electrical Engineering (ICEENG), Cairo, Egypt, May 27-29, 2009.
Mariani, G., G. Palermo, V. Zaccaria, A. Brankovic, J. Jovic, and C. Silvano, "A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip", Proceedings of DAC 2010: Design Automation Conference, Anheim, CA, USA, pp. 120–125, June, 2010.
Mariani, G., G. Palermo, V. Zaccaria, and C. Silvano, "An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks", Proc. IFIP International Conference on Very Large Scale Integration VLSI - SoC 2008, Rhodes Island, Greece, October 13-15, 2008.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Space", IEEE Transactions on Computer-Aided Design, vol. 21, issue 5, no. -: IEEE, pp. 740-753, 05/2012.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques", Proceedings of IEEE IC-SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July, 2009.
Mariani, G., G. Palermo, C. Silvano, and V. Zaccaria, "A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip", Proceedings IEEE SASP'09 - Symposium on Application Specific Processors, San Francisco, CA, USA, July, 2009.
S
Salvemini, L., M. Sami, D. Sciuto, C. Silvano, V. Zaccaria, and R. Zafalon, "A Methodology for efficient architectural exploration of energy-delay trade-offs for embedded systems", SAC 2003, Melbourne, pp. 672-678, March, 2003.
Sivakumar, G., and M. Prevostini, "Bridging the Gap between SysML and Design Space Exploration", FDL'06 Proceedings, Darmstadt, Germany, pp. 389-394, September 19-22, 2006.