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Education and Innovation in Embedded Systems Design

USI Università della Svizzera italiana, USI Faculty of Informatics, Advanced Learning and Research Institute USI Università della Svizzera italiana USI Faculty of Informatics USI Advanced Learning and Research Institute
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Filters: Keyword is unified modeling language (UML) and Author is Marcello Mura  [Clear All Filters]
2010
Luković, S., I. Kaitović, M. Mura, U. Bondi, F. Kulić, and D. Popović, "Functional model of Virtual Power Plant (VPP)", Proceedings of the 2010 CIGRE (International Council on Large Electric Systems) Session, Paris, France, July, 2010.
Luković, S., I. Kaitović, M. Mura, and U. Bondi, "Virtual Power Plant as a bridge between Distributed Energy Resources and Smart Grid", Proceedings of 43th Hawaii International Conference on System Sciences (HICSS'43), Hawaii, USA, January, 2010.
2007
Mura, M., and M. Paolieri, "SC2: State Charts to System C: Automatic Executable Models Generation", proceedings FDL07, Barcelona, Spain, September, 2007.
Mura, M., M. Paolieri, L. Negri, and M. Sami, "StateCharts to SystemC: a High Level Hardware Simulation Approach", Proceedings of GLSVLSI 2007, Stresa, Italy, March 11-13, 2007.