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"The (Not) Far-Away Path to Smart Cyber-Physical Systems: An Information-Centric Framework", Computer, vol. 50, pp. 38-47, April, 2017.
"A 640 Mbit/s 32-bit Pipelined Implementation of the AES Algorithm", SECRYPT, Porto, Portugal, July 26, 2008.
"A Methodology for Testing IPSec-based Systems", SoftCOM 2004, Split, pp. 22-26, October, 2004.
"A Memory Unit for Priority Management in IPSec Accelerators", proceedings of ICC07. Glasgow, Scotland: IEEE Communications Society, Glasgow, Scotland, June 24, 2007.
"Spotting the Malicious Moment: Characterizing Malware Behavior Using Dynamic Features", 2016 11th International Conference on Availability, Reliability and Security (ARES), Salzburg, Austria, 08/2016.
"High-level Architecture of an IPSec-dedicated System on Chip", proceedings of NGI 2007, Trondheim, Norway, IEEE Press, May, 2007.
"Self-adaptive Security at Application Level: a Proposal", ReCoSoC 2007, Jun. 2007, in proceedings of ReCoSoC 2007, June, 2007.
"A Query Unit for the IPSec Databases", SECRYPT 2007, Barcelona, Spain, 07/2007.
"A Protocol For Pervasive Distributed Computing Reliability", SecPri_WiMob 2008, Avignon, France, IEEE, 10/2008.
"A Security-enhanced Design Methodology For Embedded Systems", ICETE SECRYPT 2013, Reykjavik, Iceland, ICETE, 07/2013.
"Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"A Data protection Unit for NoC-based Architecture", CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
"Security in NoC", Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
"Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"A Security Monitoring Service for NoCs", Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
"Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
"(THOR) - The hardware onion router", 24th International Conference on Field Programmable Logic and Applications, (FPL) 2014, Munich, Germany, IEEE, 09/2014.
"Proactive Failure Management in Smart Grids for Improved Resilience (A Methodology for Failure Prediction and Mitigation)", IEEE GLOBECOM SmartGrid Resilience (SGR) Workshop, San Diego, CA, USA, 12/2015.
"Stack Protection Unit as a step towards securing MPSoCs", Proceedings of 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS), Atlanta, USA, April 19-23, 2010.
"An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.