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Filters: Author is Leandro Fiorin [Clear All Filters]
"An Automated Design Flow for NoC-based MPSoCs on FPGA", RSP 2008, The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, Monterey, USA/CA, June 2-5, 2008.
"A Configurable Monitoring Infrastructure for NoC-Based Architectures", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, 2013.
"A Data protection Unit for NoC-based Architecture", CODES+ISSS 2007, in proceedings of the Fifth IEEE/ACM/FIP International Conference of Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, September 30, 2007.
"Design of Fault Tolerant Network Interfaces for NoCs", Proceedings of 14th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'11), Oulu, Finland, September, 2011.
"Fault-Tolerant Network Interfaces for Networks-on-Chip", IEEE Trans. Dependable Secur. Comput., vol. 11, issue 1, pp. 16–29, 01/2014.
"Hardware-assisted Security Enhanced Linux in Embedded Systems: a Proposal", Proceedings of the 5th Workshop on Embedded Systems Security (WESS'2010), Scottsdale, Arizona, USA, October 24, 2010.
"Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoCs", Proceedings of the 21st IPDPS 2007 Reconfigurable Architecture Workshop (RAW), 21th IEEE International Parallel and Distributed Processing Symposium, Miami, USA/FL, April, 2008.
"A Middleware Approach to Achieving Fault-tolerance of Kahn Process Networks on Networks-on-Chips", International Journal of Reconfigurable Computing, vol. 2011, no. Article ID 295385: Hindawi, pp. 14 pages, February, 2011.
"A Monitoring System for NoCs", Proceedings of the Third International Workshop on Network on Chip Architectures (NoCArc'2010), Atlanta, Georgia, USA, December, 2010.
"MPSoCs Run-Time Monitoring through Networks-on-Chip", The 2009 Conference on Design, Automation and Test In Europe (DATE'09), Nice, France, April/2009.
"Online Task Remapping Strategies for Fault-tolerant Network-on-Chip Multiprocessors", NOCS '11: Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, pp. 1–8, 05/2011.
"Secure Memory Accesses on Networks-on-Chip", IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216-1229, September, 2008.
"Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations", DSD07, in proceedings of 10th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD 07), Lübeck, Germany, August 29-31, 2007.
"Security Enhanced Linux on Embedded Systems: a Hardware-accelerated Implementation", 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, 02/2012.
"Security in NoC", Networks-on-Chips: Theory and Practice: Taylor and Francis Group, LLC - CRC Press, pp. 157-194, 2009.
"A Security Monitoring Service for NoCs", Sixth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'08), Atlanta, Georgia, USA., 10/2008.
"Stack Protection Unit as a step towards securing MPSoCs", Proceedings of 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS), Atlanta, USA, April 19-23, 2010.
"System Adaptivity and Fault-tolerance in NoC-based MPSoCs: the MADNESS Project Approach", Proceedings of the 15th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD'12), Izmir, Turkey, September 5-8, 2012.
"A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.", Microprocessors and Microsystems - Embedded Hardware Design, vol. 37, issue 6-7, pp. 515–529, 2013.