@conference {18541,
	title = {Learning in Nonstationary Environments: A Hybrid Approach},
	booktitle = {Artificial Intelligence and Soft Computing},
	year = {2017},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	address = {Cham},
	abstract = {Solutions present in the literature to learn in nonstationary environments can be grouped into two main families: passive and active. Passive solutions rely on a continuous adaptation of the envisaged learning system, while the active ones trigger the adaptation only when needed. Passive and active solutions are somehow complementary and one should be preferred than the other depending on the nonstationarity rate and the tolerable computational complexity. The aim of this paper is to introduce a novel hybrid approach that jointly uses an adaptation mechanism (as in passive solutions) and a change detection triggering the need to retrain the learning system (as in active solutions).},
	isbn = {978-3-319-59060-8},
	author = {Alippi, Cesare and Qi, Wen and Roveri, Manuel},
	editor = {Rutkowski, Leszek and Korytkowski, Marcin and Scherer, Rafa{\l} and Tadeusiewicz, Ryszard and Zadeh, Lotfi A. and Zurada, Jacek M.}
}
@conference {18537,
	title = {A lightweight and energy-efficient Internet-of-birds tracking system},
	booktitle = {2017 IEEE International Conference on Pervasive Computing and Communications (PerCom)},
	year = {2017},
	month = {March},
	keywords = {animal movement tracking, application server, Birds, cellular radio, cloud computing, energy assessment, energy conservation, energy consumption, energy efficient Internet-of-birds tracking system, GSM, GSM-based tracking device energy consumption reduction, Internet of Things, Internet-of-things vision, joint localization-transmission phase, Northern Italy, quality of service, Radar tracking, Receivers, Satellites, telecommunication power management, Tracking, Transmitters},
	doi = {10.1109/PERCOM.2017.7917862},
	author = {Alippi, Cesare and Ambrosini, Roberto and Longoni, Violetta and Cogliati, Dario and Roveri, Manuel}
}
@conference {18562,
	title = {Lattice-based cryptography: From reconfigurable hardware to {ASIC}},
	booktitle = {2016 International Symposium on Integrated Circuits (ISIC)},
	year = {2016},
	month = {12/2016},
	publisher = {IEEE},
	organization = {IEEE},
	doi = {10.1109/isicir.2016.7829689},
	url = {https://doi.org/10.1109/isicir.2016.7829689},
	author = {Oder, Tobias and G{\"u}neysu, Tim and Valencia, Felipe and Khalid, Ayesha and O{\textquoteright}Neill, Maire and Regazzoni, Francesco}
}
@conference {18071,
	title = {Lightweight AES-Based Authenticated Encryption},
	booktitle = {Fast Software Encryption (FSE)},
	year = {2013},
	month = {March},
	address = {Singapore},
	author = {Bogdanov, Andrey and Mendel, Florian and Regazzoni, Francesco and Rijmen, Vincent and Tischhauser, Elmar}
}
@conference {17730,
	title = {A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs},
	booktitle = {Proceedings of the 3rd International Conference on Pervasive and Embedded Computing and Communication Systems (PECCS) - Special Session on Self-Adaptive Networked Embedded Systems (SANES)},
	year = {2013},
	month = {February 19-21},
	address = {Barcelona, Spain},
	abstract = {Self-adaptive systems are able to adapt themselves to mutating internal/external conditions so as to meet their goals. One of the challenges to be tackled when designing such systems is the overhead introduced in making the system monitorable and adaptable. A large overhead can easily compensate the benefits of adaptation. In this work, we are addressing this challenge within the context of KPN applications on NoC-based MPSoCs. In particular, parametric adaptations at the application level are considered. We present a low overhead technique for the implementation of the monitor-controller-adapter loop, which is present in self-adaptive systems. The technique is fundamentally based on an extended network interface which provides the ability to interrupt remote tiles on a NoC-based multiprocessor platform. Results from the MJPEG case study show that the proposed interrupt-based approach incurs an overhead as low as 0.4\% without compromising the quality of the adaptation control. Our new technique provides an improvement of approximately 6.25\% compared to another state-of-the-art technique that interacts with the application using KPN semantics (i.e., blocking channels). Moreover, the sensitivity of the overhead to the complexity of the adaptation controller is much lower in case of our interrupt-based technique as compared to the blocking channel based scheme.},
	keywords = {event-based control, kahn process networks (KPN), network-on-chip (NoC), self-adaptivity},
	author = {Derin, Onur and Ramankutty, Prasanth Kuncheerat and Meloni, Paolo and Tuveri, Giuseppe}
}
@conference {18076,
	title = {LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network},
	booktitle = {IEEE-EMBS International Conference on Biomedical and Health Informatics},
	year = {2012},
	month = {January},
	address = {Hong Kong, China},
	author = {Lamichhane, Bishal and Mudda, Steven and Regazzoni, Francesco and Puiatti, Alessandro}
}
@article {145.YkAvMaZaPaSi11,
	title = {Linking run-time resource management of embedded multi-core platforms with automated design-time exploration},
	journal = {IET Computers and Digital Techniques},
	volume = {5},
	number = {-},
	year = {2011},
	pages = {123{\textendash}135},
	abstract = {Nowadays, owing to unpredictable changes of the environment and workload variation, optimally running multiple applications in terms of quality, performance and power consumption on embedded multi-core platforms is a huge challenge. A lightweight run-time manager, linked with an automated design-time exploration and incorporated in the host processor of the platform, is required to dynamically and efficiently configure the applications according to the available platform resources (e.g. processing elements, memories, communication bandwidth), for minimising the cost (e.g. power consumption), while satisfying the constraints (e.g. deadlines). This study presents a flow linking a design-time design space explorer, coupled with platform simulators at two abstraction levels, with a fast and lightweight priority-based heuristic integrated in the run-time manager to select near-optimal application configurations. To illustrate its feasibility and the very low complexity of the run-time selection, the proposed flow is used to manage the processors and clock frequencies of a multiple-stream MPEG4 encoder chip dedicated to automotive cognitive safety applications.},
	doi = {http://dx.doi.org/10.1049/iet-cdt.2010.0030},
	author = {Ykman-Couvreur, Chantal and Avasare, Prabhat and Mariani, Giovanni and Zaccaria, Vittorio and Palermo, Gianluca and Silvano, Cristina}
}
@conference {18078,
	title = {Low Cost FPGA Implementations of the SHA-3 Finalists},
	booktitle = {10th Smart Card Research and Advanced Application Conference (CARDIS)},
	year = {2011},
	month = {September},
	address = {Leuven, Belgium},
	author = {Kerckhof, St{\'e}phanie and Durvaux, Fran{\c c}ois and Veyrat-Charvillon, Nicolas and Regazzoni, Francesco and de Dormale, Guerric Meurice and Standaert, Fran{\c c}ois-Xavier}
}
@conference {119.AvVaYkMaPaZaSi10,
	title = {Linking run-time management with design space exploration at multiple abstraction levels},
	booktitle = {Proceedings of the DATE{\textquoteright}10 workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications},
	year = {2010},
	month = {March},
	address = {Dresden, Germany},
	abstract = {In present era of Multi-Processor System-on-Chip (MPSoC) embedded devices, to run multiple applications optimally (in terms of execution time and power consumption) is an enormous challenge. Embedded designers usually tackle this challenge by dividing it in two parts : at design-time Design Space Explorations (DSE) are performed to derive Pareto set of optimum operating points for each application and at run-time embedded device is monitored continuously to operate at one of the points in the derived Pareto set. Obviously run-time management relies heavily on accuracy of DSE. With growing complexity of embedded devices and with time-to-market pressures, at design-time, it is not trivial to derive the operating point Pareto set. On the other hand, at run-time, overhead introduced by a run-time management scheme should also not be high so as to minimally affect embedded device performance . We have developed techniques to tackle these embedded design issues. At design time, we use DSE with multiple simulators running at multiple abstraction levels to converge quickly to Pareto set of operating points. At runtime, to keep run-time overhead to a minimum, a hierarchical Runtime Resource Manager (RRM) is used with well-defined interfaces (services) between global and local resource managers. We applied our methodology on an embedded device having eight processor cores running multiple MPEG4 encoders. With our DSE methodology, we could derive Pareto set much quickly (as compared to full-space explorations). With our run-time schemes, overhead introduced by run-time manager was negligible.},
	author = {Avasare, Prabhat and Vanmeerbeeck, Geert and Ykman-Couvreur, Chantal and Mariani, Giovanni and Palermo, Gianluca and Zaccaria, Vittorio and Silvano, Cristina}
}
@conference {18087,
	title = {Low Cost Software Countermeasures Against Fault Attacks: Implementation and Performances Trade Offs},
	booktitle = {5th Workshop on Embedded Systems Security (WESS)},
	year = {2010},
	month = {October},
	address = {Scottsdale, Arizona, USA},
	author = {Barenghi, Alessandro and Breveglieri, Luca and Koren, Israel and Pelosi, Gerardo and Regazzoni, Francesco}
}
@conference {63.Der2007,
	title = {Learning Java by a Card Game: A Case Study},
	booktitle = {LG2007: Proceedings of Learning with Games Conference},
	year = {2007},
	month = {September 24-27},
	pages = {221{\textendash}228},
	address = {Sophia Antipolis, France},
	abstract = {To teach Java programming language better and in a more enjoyable way, we developed a framework for card games that allows students to write and test their own intelligent players. This paper briefly describes the design of the framework, the advantages of using it to assign homework and reports our experience with a class carried out in our institute.},
	keywords = {assignment, card games, case study, java, pedagogy},
	isbn = {978-88-901168-0-3},
	author = {Derin, Onur},
	editor = {Taisch, Marco and Cassina, Jacopo}
}
