@conference {18481,
	title = {Design methodologies for securing cyber-physical systems},
	booktitle = {2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS},
	year = {2015},
	month = {10/2015},
	pages = {30-36},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Amsterdam, Netherlands},
	abstract = {Cyber-Physical Systems (CPS) are in most cases safety- and mission-critical. Standard design techniques used for securing embedded systems are not suitable for CPS due to the restricted computation and communication budget available in the latter. In addition, the sensitivity of sensed data and the presence of actuation components further increase the security requirements of CPS. To address these issues, it is necessary to provide new design methods in which security is considered from the beginning of the whole design flow and addressed in a holistic way. In this paper, we focus on the design of secure CPS as part of the complete CPS design process, and provide insights into new requirements on platform-aware design of control components, design methodologies and architectures posed by CPS design. We start by discussing methods for the multi-disciplinary modeling, simulation, tools, and software synthesis challenges for CPS. We also present a framework for design of secure control systems for CPS, while taking into account properties of the underlying computation and communication platforms. Finally, we describe the security challenges in the computing hardware that is used in CPS},
	keywords = {cyber-physical system security, design flow, embedded systems, platform-aware design, safety-critical system, security of data, sensed data sensitivity},
	isbn = {978-1-4673-8321-9},
	doi = {10.1109/CODESISSS.2015.7331365},
	url = {http://dx.doi.org/10.1109/CODESISSS.2015.7331365},
	author = {Faruque, Mohammad Abdullah A and Regazzoni, Francesco and Pajic, Miroslav}
}
@conference {18480,
	title = {Fault attacks, injection techniques and tools for simulation},
	booktitle = {10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015},
	year = {2015},
	month = {04/2015},
	pages = {1-6},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Naples, Italy},
	abstract = {Faults attacks are a serious threat to secure devices, because they are powerful and they can be performed with extremely cheap equipment. Resistance against fault attacks is often evaluated directly on the manufactured devices, as commercial tools supporting fault evaluation do not usually provide the level of details needed to assert the security of a device. Early identification of weak points would instead be very useful as it would allow to immediately apply the appropriate countermeasures directly at design time. Moving towards this goal, in this work, we survey existing fault attacks and techniques for injecting faults, and we analyze the suitability of existing electronic design automaton commodities for estimating resistance against fault attacks. Our exploration, which includes the type of attacks that can be simulated and the limitations of each considered simulation approach, is an initial step towards the development of a complete framework for asserting fault attack robustness},
	keywords = {fault attacks robustness, fault resilience, injection techniques, secure devices, security, security of data},
	isbn = {978-1-4799-1999-4},
	doi = {10.1109/DTIS.2015.7127352},
	url = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7118811},
	author = {Piscitelli, Roberta and Bhasin, Shivam and Regazzoni, Francesco}
}
