|Title||An Application Level Synthesis Methodology for Embedded Systems|
|Publication Type||Conference Paper|
|Year of Publication||2002|
|Authors||Alippi, C., A. Galbusera, and M. Stellini|
|Conference Name||ISCAS 2002|
|Date Published||May 26-29|
Time-to-market, cost and power consumption requirements are pushing research in embedded systems towards the development of sophisticated CAD environments. The paper suggests a novel synthesis methodology for embedded devices based on an application level perturbation analysis. The methodology is based on randomised algorithms for evaluating the effective performance loss of the computational flow induced by perturbations and a Tabu-search optimising algorithm for distributing the tolerable performance loss along the computational subsystems composing the computation.