Course type: Lecture 
Value in ECTS: 6

Objective
This course introduces students to design methods and tools for integrated circuits and systems. It focuses on modeling and on circuit synthesis by stepwise refinement. It presents optimisation problems and algorithms that are common in embedded circuit/system design and it shows a simple design flow for designing integrated circuits. The course is reinforced by exercises and a mini-project using stateof-the-art commercial tools.

Contents

• Design styles: standard cells, gate arrays, field-programmable gate arrays. Pareto point analysis.
• Modeling languages and formalisms: formal basis, properties, semantics, expressive power.
• Graphical models, Statecharts.
• Hardware compilation and high-level synthesis. Technology independent and dependent transformations. Scheduling, resource sharing, data path and control synthesis
• Synthesis of communication structures like buses and networks on chips.
• Fundamentals of logic and binary decision diagrams.
• Multi-level logic synthesis. Algebraic and Boolean Methods, don´t care conditions, relations between synthesis and testability, libraries and library mapping.
• Sequential synchronous circuit design and retiming.
• Elements of physical design impact