Compiler-based optimizations of embedded systems
Professor | Marwedel Peter |
Course program | MAS |
Year | 1 |
Semester | Spring |
Category | Elective |
ECTS | 3 |
Academic year | 2013/2014 |
Objective
The course will present a view on code optimization techniques which are or could be made available in compilers targeting embedded systems. The focus is on techniques exploiting memory hierarchies. Optimization techniques for caches and scratch pad memories will be presented. Objectives include energy consumption as well as worst case execution times. The use of optimization techniques such as integer linear programming and evolutionary algorithms will be demonstrated. Optimization techniques will also be applied to approximate computations, automatic parallelization and voltage selection.
Contents
- Introduction: objectives in embedded system design, the memory hierarchy
- Scratch pad memories: hardware and compiler techniques
- Compiler optimizations for caches
- Worst case execution times: cache aging, implicit path enumeration and code optimization
- Optimizations in hardware/software synthesis
- Compiler support for approximate computations
- Using integer linear programming (ILP) and evolutionary algorithms for code optimization
- ILP approach for parallelizing compilers and voltage selection
- Worksheets and exercises
Teaching mode
The course will consist of interleaved lectures and labs/exercises. Lectures will provide a mix of overview material and details of immediately applicable techniques. In the labs, focus will be on work sheets. Works sheets will be designed such that techniques presented in the class can be applied to practical problems. Some of the work sheets will require the use of tools on a computer. Labs are inspired by a style of teaching called “flipped classroom”. Evaluation of the students will be based on their performance during the lab and in a written exam