Course type: Lecture 

Value in ECTS: 6

Academic year 2013/2014 - Fall semester

Objective
The course deals with advanced computer architectures, giving particular at¬tention to aspects of interest for embedded systems. Topics include, but are not limited to, cache architecture and organisation, pipelined CPUs, Instruction-Level Parallelism in CPUs (with particular reference to superscalar architectures), DSP CPUs, and multiprocessor architectures.

Contents

• Getting better performances from the basic architecture: high-performance cache systems
• Pipelined scalar architectures: scheduling for better performances. Managing the control hazard problem. The ARM alternative.
• Better performances with a single CPU: ILP. Superscalar architectures. Dynamic scheduling, speculative execution, data-flow-based execution. The Tomasulo solution. The Reorder Buffer. Advanced speculation techniques.
• Multithreading: from ILP to TLP. Fine-grained and coarse-grained multithreading. Simultaneous multithreading
• Multiprocessor architectures: the taxonomy. Basic SIMD and vector architectures.
• MIMD architectures: basic approaches and problems. Performance evaluation.
• The Message-passing solution.
• Shared-memory architectures: problems and approaches. Cache coherence protocols
• Cache system evaluation
• Architecture space exploration: use of SimpleScalar and Cacti.

Teaching mode 
The course includes lectures, exercises and practice.

References
J. Hennessey, D. Patterson "Computer Architecture: a quantitative approach", 5th edition, Morgan-Kaufmann Publishers.