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MADNESS

Methods for predictable design of heterogeneous embedded system with adaptivity and reliability support

Abstract. The MADNESS project aims at the definition of innovative system-level design methodologies for embedded systems, able to drive the optimal composition of an heterogeneous MPSoC architecture, according to the requirements and the features of a given target application field.
The proposed methodologies will extend the classic concept of design space exploration, to cope with high heterogeneity, technology scaling, system reliability and multi-application demands, pursuing the following objectives:
-Improve design predictability of highly heterogeneous embedded systems, bridging the so called "implementation gap", i.e. the gap between the results that can be predicted during the system-level design phase and those eventually obtained after the on-silicon implementation.
-Consider, apart from more traditional constraints (typically, cost, performance, power consumption), continued availability of service, taking into account fault recovery as one of the optimization factors to be satisfied.
-Support adaptive runtime management of the architecture.

The technical approach of the project will rely on the following methods:
-In order to improve the design predictability, traditional system-level design methodologies will be extended to consider variables strictly related with physical implementation of the architecture, leveraging a specific layer for rapid and accurate on-hardware FPGA-based emulation.
-In order to address fault tolerance and adaptive runtime resources management, new methodologies are going to be defined and included in system-level exploration. Specific hardware/middleware IP modules will be developed to pursue those objectives.

The results of the project are expected to have a deep impact on the design flow for high-complexity embedded systems, facilitating and enhancing the exploration of the architectural design space, therefore resulting in a significantly increased overall productivity.

COMES

Complexity Management in Embedded Systems

Abstract. The COMES educational project aims at realizing an educational program on “COmplexity Management in Embedded Tera-Systems” (COMES), complexity management being a well known and increasingly important field. The project relives within the Nano-Tera.ch framework (to go to Nano-Tera website click here); The actions to be organized in 2009, dealing with fundamental aspects, can be seen as laying the foundations for subsequent educational activities to be envisioned for future years, that could bring the focus of the complexity problem onto “vertical” Nano-Tera subjects such as software, system design, networking, technology.
The educational offer will be structured in a manner to provide a flexible answer to users’ needs as user background and present objectives.
Moreover, the COMES intend to enable agile dissemination and sharing of experiences and results with other researchers, in particular belonging to the Nano-Tera community.

MIARIA

Monitoraggio Idrogeologico Adattivo a supporto del piano di Rischio Integrato Alpino

Abstract. The project aims at building innovative systems and technologies for distributed acquisition of territorial data and their communication to second generation operative centers. Such data will be aggregated on a phenomenological basis and dynamic risk scenarios will be generated for alpine cross-border areas paying particular attention Domino Effect. In particular the specific distributed monitoring action - based on Wireless Sensor Network technologies (complementing existing monitoring points) will provide data necessary to build a dynamic risk map of the specific area. This dynamic risk map is integrated with a static map of the technological and networking risk present in the territories so to eventually provide an Alpine Area Integrated Risk Plan with dynamic characteristics. Furthermore the monitoring system allows dynamic forecasting of risk immediately before emergency situations as it will be possible to collect real time information from the field.

AlpEnergy

Virtual Power Systems as an Instrument to Promote Transnational Cooperation and Sustainable Energy Supply in the Alpine Space

Abstract. At present, the Alpine Space is characterised by strong territorial discrepancies with regard to (conventional) energy supply. Rich endogenous renewable energy sources (RES) like hydropower, solar and wind energy, wood and other biomass exist throughout the Alpine Space. But equal access to their use is even more restricted because the use and the need to balance electricity production requires a strong electric grid and its – often unacceptable – extension or strengthening if the rate of RES is to be increased.

Virtual Power Systems (VPS) offer an alternative by using ICT technology for intelligent combinations of RES, load management and storage. A prerequisite are innovative ways of cooperation among utilities, independent power producers and consumers. VPS have a high potential to trigger new knowledge-based and competitive economic activities. AlpEnergy will explore this potential and sensitise political and business decision makers.

Partners: Allgäu Initiative GbR – Kempten, Germania; BAUM Consult GmbH – Munchen, Germania; Provincia di Mantova; Technical Foundation of the University of Milano - Department for Planning, Environment and Energy; Rhônalpénergie-Environnement – Lion, France; Institut National Plytechnique de Grenoble – St. Martin D’Heres, France ;Business support centre Kranj (BSC) d.o.o. – Kranj, Slovenia; Elektro Gorenjska, distributor of electrical energy, d.d. – Kranj, Slovenia.

EPON

Abstract. This projects aims to design and develop a new generation of Ethernet PON-based devices that optimize the bandwidth usage as the installation costs. Our devices are compact FPGA-based, SOPC reconfigurable digital logic modules enclosing WDM technology to enhance the bandwidth available per node. Furthermore their modular and reconfigurable architecture allows scalable network design and in-field system upgrade. Additionally they include hardware bandwidth accelerators and propose some remote monitor and maintenance facilities.

MULTICUBE

Abstract. Many point tools exist to optimize particular aspects of embedded systems. However, an overall design space exploration framework is needed to combine all the decisions into a global search space, and a common interface to the optimization and evaluation tools.

The MULTICUBE project focuses on the definition of an automatic multi-objective Design Space Exploration (DSE) framework to be used to tune the System-on-Chip architecture for the target application evaluating a set of metrics (e.g. energy, latency, throughput, bandwidth, QoR, etc.) for the next generation embedded multimedia platforms.

AETHER

Abstract. The purpose of the AETHER project is to show that self-adaptive computing architectures can be a powerful approach to simultaneously addressing the major problems raised by pervasive computing. AETHER's main objectives are to study, evaluate and propose novel computing architectures responding to the most demanding embedded applications in the next 10+ years.

In particular, the AETHER project aims to tackle the issues related to the performance and technological scalability, increased complexity and programmability of future embedded computing architectures by introducing self-adaptive technologies in computing resources. The AETHER consortium will study and propose self-adaptive networked entities (SANE) based on reconfigurable computing architectures, and study their impact at various levels of the computing chain such as operating environments, programming methods and tools and application design. The potential benefits of the proposed approach will be assessed and validated with industrial partners on realistic application scenarios.

LoMoSA

Abstract. The LoMoSA project aims at the creation of a low-power expertise for mobile and multimedia applications by initiating the development of a European low-power System-on-Chip (SoC) platform.
It consists of an interacting combination of (architectural) models, design flows and methodologies, hardware design components, embedded software and test-benches. The project investigates low-power solutions for bus-controlled SoCs, but also covers the impact on power, scalability and performance of future multiprocessor SoC infrastructures based on novel on-chip communication solutions.
LoMoSA brings together world-class experts from the industry (NXP, STMicroelectronics, Thales, Thomson), university research labs and institutes (CEA-LETI, CEA-LIST, TIMA, ALaRI, University of Cantabria) and 1 SME's (DS2).

COOPER

Abstract. The COOPER project is dedicated to supporting long-distance cooperation of teams of students working on complex projects, assuming that the students and advisors are geographically dispersed and have heterogeneous backgrounds and competencies. COOPER applies to the following learning environments:

Graduate (or post-graduate) university studies involving students and lecturers participating in focused projects (e.g., masters or specialization courses) coming from different institutions and backgrounds;
Company universities and company training, involving multi-national participants coming from company's sites or customers which are world-wide dispersed, participating in the launching of new product or technology, or in product- and project-centred training.

Stemming from these requirements, COOPER's main technological objective is to develop and test a model-driven, extensible environment that supports in individual and collective competency building in virtual teams, whose members are geographically dispersed, have different backgrounds and competencies, working together in projects to solve complex problems. The COOPER project will achieve this goal by focusing on and providing the following results:

Create a reference model for cooperative teamwork processes;
Create interoperable and validated pedagogical scenarios and assessment strategies;
Create and test tools to support knowledge co-construction, sharing and re-use;
Create a common COOPER software platform in which these models, scenarios, strategies and tools are integrated;
Gather requirements as well as pilot results and evaluations in representative case studies.

All results delivered by the project will contribute to forming a protected, shared COOPER environment, that will be easily deployed over any University's or Company's Intranet. The COOPER environment will feature the use of advanced technology (e.g. VOI) provided by two small SMEs at the forefront of EU innovation edge

SNF Security Design Methodologies for Energy-Efficient Secure Cryptography Coprocessors

Abstract. The increasing ubiquity of information technologies in all aspects of human life makes security issues one of the most critical aspects of system design: far from being a problem confined to a few specialists whose systems are exposed to potential threats, security now is of interest almost to everybody and it affects not only computer systems proper but also the increasingly-wide spectrum of embedded systems. In fact, several new forms of attacks to cryptographic algorithms have been developed, such as timing analysis and power analysis attacks. They exploit weaknesses of the hardware platform where the algorithm is implemented. The importance of the threat is proportional to the proliferation of security-sensitive devices, especially including a great number of novel embedded devices, often portable and battery-operated. Several solutions have been proposed and implemented against such attacks. But yet, several problems remain.
No comprehensive comparison of the robustness and cost of the techniques to counter timing and power analysis attacks have been attempted. Only recently researchers have introduced metrics of robustness for existing programmable devices. As a first step in the proposed project, we wish to explore more precisely the issue of security metrics. We need to tackle the problem and obtain a priori metrics at least sufficient to guide us in subsequent phases.
Next step consists in elaborating novel techniques that combine the best robustness features and that are easily amenable to design automation. We will also explore new solutions, for instance exploiting some unorthodox techniques of logic synthesis. Again we will compare the different possibilities and concentrate on one or two options. We will put in practice these options to conceive flexible tightly-coupled coprocessors for cryptographic applications, possibly based on a reconfigurable datapath.
We plan to demonstrate our results with the VLSI design of significant sections of a coprocessor in a typical embedded computing subsystem.
More information about proposal.

Calipso RFP Research Proposal

Abstract. IPSec is an important part of the Mobile IPv6 protocol that can be used to provide security services for the IP datagrams being sent over the network. The aim of this project is to provide a set of guidelines for IPSec configuration and to study possible optimizations of the protocol in a Mobile IPv6 environment. To provide an experimental basis for definition of such guidelines, a test network made of Intel SA-1110 boards equipped with wireless cards will be built and specific performance figures will be collected.
More information about proposal.